The present invention relates to semiconductor devices, and particularly to bipolar complementary metal-oxide-semiconductor (BiCMOS) integrated structures including a bipolar transistor having a self-aligned base formed by selective epitaxy and complementary metal-oxide-semiconductor (CMOS) devices having a metal gate and a high-k gate dielectric and methods of manufacturing the same.
One of the key technological innovations for improving performance of CMOS devices has been the introduction of high dielectric constant (high-k) dielectric materials for the gate dielectric of field effect transistors. The high-k dielectric materials include dielectric metal oxides that have a dielectric constant greater than 3.9, which is the dielectric constant of silicon oxide. Typically, such high-k dielectric materials have a dielectric constant greater than 7.5.
Performance of advanced CMOS transistors is further enhanced by employing a metal gate, which refers to a gate electrode including a metal layer, i.e., a layer of an elemental metal or an intermetallic compound that is not an alloy of silicon. The metal gate increases the conductive of the gate electrode of a transistor so that the RC delay of the gate electrode is reduced compared with a gate electrode employing a doped semiconductor material and/or a metal-semiconductor alloy such as a silicide.
Use of a high-k gate dielectric and/or a metal gate introduces tremendous difficulties in integration with bipolar devices because the patterning of the high-k dielectric material requires dedicated patterning processes that are not compatible with existing processes for manufacturing a bipolar junction transistor. Additional processing steps introduced to enable integration of bipolar junction transistors with CMOS devices employing a high-k gate dielectric and/or a metal gate tend to drive up the complexity of the overall processing sequence and the cost of manufacturing BiCMOS devices. Manufacturable integration schemes for BiCMOS devices including a high-k gate dielectric and/or a metal gate require a minimal number of additional processing steps.